Senior Staff, DFT Design Engineer

Work on FPGA designs by combining open-source FPGA methodology with proprietary technologies that enable a faster design-to-silicon turnaround.

Use the latest innovative AI-enhanced EDA tools to provide the most optimized designs.

What’s in it for you:

  • Market Competitive Salary package and incentives based on performance
  • You will be part of a highly qualified and professional team.
  • Working with international customers from the U.S., China, and/or South Korea.
  • Clearly defined career growth path and technical roadmap for personal growth.
  • Greenfield projects with well-defined product roadmaps

What you'll do:

  • Define, implement, and verify DFT architecture and features for Scan / MBIST / JTAG / ATPG / boundary-scan.
  • Setup DFT development methodologies, plans, and schedules.
  • ATPG patterns verification with gate-level simulation.
  • Decide the tradeoff of test coverage and test cost.
  • Support post-silicon bring-up and yield analysis.

What you'll need:

  • Master with at least 6 years or Bachelor with at least 8 years demonstrated experience in DFT for VLSI designs.
  • Expert in scan insertion, ATPG, MBIST, JTAG, boundary scan, Scan Compression, and at-speed testing.
  • Engagement with Design teams on pre-Silicon test planning and validation.
  • Excellent debugging skills for RTL and gate-level simulations.
  • Good communication skills and the ability to work with teams crossing different geos.
  • Knowledge of defect types, fault models, debugging, and validation on ATE and silicon bring-up.
  • Proven leadership skills.

For a detailed conversation, Apply NOW and let's have a chat.